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ld
has additional features on some platforms; the following
sections describe them. Machines where ld
has no additional
functionality are not listed.
4.1 ld
and the H8/3004.2 ld
and the Intel 960 family4.4 ld
's support for interworking between ARM and Thumb codeld
and the ARM family4.5 ld
and HPPA 32-bit ELF supportld
and HPPA 32-bit ELF4.6 ld
and MMIX4.3 ld
and the Motorola 68HC11 and 68HC12 families4.7 ld
's support for various TI COFF versionsld
and TI COFF
ld
and the H8/300
For the H8/300, ld
can perform these global optimizations when
you specify the `--relax' command-line option.
ld
finds all jsr
and jmp
instructions whose
targets are within eight bits, and turns them into eight-bit
program-counter relative bsr
and bra
instructions,
respectively.
ld
finds all mov.b
instructions which use the
sixteen-bit absolute address form, but refer to the top
page of memory, and changes them to use the eight-bit address form.
(That is: the linker turns `mov.b @
aa:16' into
`mov.b @
aa:8' whenever the address aa is in the
top page of memory).
ld
and the Intel 960 family You can use the `-Aarchitecture' command line option to specify one of the two-letter names identifying members of the 960 family; the option specifies the desired output target, and warns of any incompatible instructions in the input files. It also modifies the linker's search strategy for archive libraries, to support the use of libraries specific to each particular architecture, by including in the search loop names suffixed with the string identifying the architecture.
For example, if your ld
command line included `-ACA' as
well as `-ltry', the linker would look (in its built-in search
paths, and in any paths you specify with `-L') for a library with
the names
try libtry.a tryca libtryca.a |
The first two possibilities would be considered in any event; the last two are due to the use of `-ACA'.
You can meaningfully use `-A' more than once on a command line, since the 960 architecture family allows combination of target architectures; each use will add another pair of name variants to search for when `-l' specifies a library.
ld
supports the `--relax' option for the i960 family. If
you specify `--relax', ld
finds all balx
and
calx
instructions whose targets are within 24 bits, and turns
them into 24-bit program-counter relative bal
and cal
instructions, respectively. ld
also turns cal
instructions into bal
instructions when it determines that the
target subroutine is a leaf routine (that is, the target subroutine does
not itself call any subroutines).
ld
and the Motorola 68HC11 and 68HC12 families
For the Motorola 68HC11, ld
can perform these global
optimizations when you specify the `--relax' command-line option.
ld
finds all jsr
and jmp
instructions whose
targets are within eight bits, and turns them into eight-bit
program-counter relative bsr
and bra
instructions,
respectively.
ld
also looks at all 16-bit extended addressing modes and
transforms them in a direct addressing mode when the address is in
page 0 (between 0 and 0x0ff).
gcc
is called with `-mrelax', it can emit group
of instructions that the linker can optimize to use a 68HC11 direct
addressing mode. These instructions consists of bclr
or
bset
instructions.
For 68HC11 and 68HC12, ld
can generate trampoline code to
call a far function using a normal jsr
instruction. The linker
will also change the relocation to some far function to use the
trampoline address instead of the function address. This is typically the
case when a pointer to a function is taken. The pointer will in fact
point to the function trampoline.
ld
's support for interworking between ARM and Thumb code
For the ARM, ld
will generate code stubs to allow functions calls
betweem ARM and Thumb code. These stubs only work with code that has
been compiled and assembled with the `-mthumb-interwork' command
line option. If it is necessary to link with old ARM object files or
libraries, which have not been compiled with the -mthumb-interwork
option then the `--support-old-code' command line switch should be
given to the linker. This will make it generate larger stub functions
which will work with non-interworking aware ARM code. Note, however,
the linker does not support generating stubs for function calls to
non-interworking aware Thumb code.
The `--thumb-entry' switch is a duplicate of the generic `--entry' switch, in that it sets the program's starting address. But it also sets the bottom bit of the address, so that it can be branched to using a BX instruction, and the program will start executing in Thumb mode straight away.
ld
and HPPA 32-bit ELF support ld
will by default generate
import stubs suitable for use with a single sub-space application.
The `--multi-subspace' switch causes ld
to generate export
stubs, and different (larger) import stubs suitable for use with
multiple sub-spaces.
Long branch stubs and import/export stubs are placed by ld
in
stub sections located between groups of input sections.
`--stub-group-size' specifies the maximum size of a group of input
sections handled by one stub section. Since branch offsets are signed,
a stub section may serve two groups of input sections, one group before
the stub section, and one group after it. However, when using
conditional branches that require stubs, it may be better (for branch
prediction) that stub sections only serve one group of input sections.
A negative value for `N' chooses this scheme, ensuring that
branches to stubs always use a negative offset. Two special values of
`N' are recognized, `1' and `-1'. These both instruct
ld
to automatically size input section groups for the branch types
detected, with the same behaviour regarding stub placement as other
positive or negative values of `N' respectively.
Note that `--stub-group-size' does not split input sections. A single input section larger than the group size specified will of course create a larger group (of one section). If input sections are too large, it may not be possible for a branch to reach its stub.
ld
and MMIX ELF
object files or
mmo
object files when linking. The simulator mmix
understands the mmo
format. The binutils objcopy
utility
can translate between the two formats.
There is one special section, the `.MMIX.reg_contents' section.
Contents in this section is assumed to correspond to that of global
registers, and symbols referring to it are translated to special symbols,
equal to registers. In a final link, the start address of the
`.MMIX.reg_contents' section corresponds to the first allocated
global register multiplied by 8. Register $255
is not included in
this section; it is always set to the program entry, which is at the
symbol Main
for mmo
files.
Symbols with the prefix __.MMIX.start.
, for example
__.MMIX.start..text
and __.MMIX.start..data
are special;
there must be only one each, even if they are local. The default linker
script uses these to set the default start address of a section.
Initial and trailing multiples of zero-valued 32-bit words in a section, are left out from an mmo file.
ld
's support for various TI COFF versions ld
will read any version or byte order, but the output
header format depends on the default specified by the specific target.
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